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annotate src/defs.s @ 121:5d5472b11ccd
Initital skeleton of separation of separate parsing scheme
This is the first commit in a long series related to separating the parsing
of the input code from the execution of the code. It should allow for more
efficient, and probably simpler, execution while giving quicker feedback
when someone types in syntactically invalid code.
author | William Astle <lost@l-w.ca> |
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date | Sun, 31 Dec 2023 17:44:39 -0700 |
parents | 6db72a92ff7a |
children | 917b4893bb3d |
rev | line source |
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1 *pragmapush list |
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2 *pragma list |
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3 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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4 ; Various constants |
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5 console_curdel equ 10 ; delay between cursor blink cycles |
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6 keyb_bufflen equ 64 ; keyboard ring buffer length |
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7 keyb_repdeli equ 40 ; ticks before initial repeat (2/3 s) |
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8 keyb_repdelr equ 6 ; 10 repeats per second |
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9 keyb_caps equ 0x80 ; capslock enabled |
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10 keyb_alt equ 0x04 ; alt pressed |
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11 keyb_ctrl equ 0x02 ; ctrl pressed |
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12 keyb_shift equ 0x01 ; shift pressed |
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13 linebuffsize equ 0x100 ; the line input buffer (256 bytes) |
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14 stringstacknum equ 20 ; number of entries on the anonymous string descriptor stack |
121
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15 stackheadroom equ 50 ; required headroom for the stack on OM checks |
73
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16 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
100
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17 ; Data structure used for calculations. Calculations are handled via structures called value accumulators. A value |
73
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18 ; accumulator consists of a data type flag (at the end of the structure) and a data area whose layout varies based |
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19 ; on the actual data type. The layouts for each value type are described below. |
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20 ; |
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21 ; A value type that is NULL (not set to anything) has type 0 (valtype_none) and the rest should be zero. |
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22 ; |
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23 ; A value accumulator has the following structure for floating point, which holds a packed floating point value: |
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24 ; Offset Length Contents |
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25 ; 0 1 fp exponent and sign |
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26 ; 1 5 fp mantissa |
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27 ; 6 1 value type |
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28 ; |
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29 ; A value accumulator has the following structure for integers: |
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30 ; Offset Length Contents |
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31 ; 0 4 integer value (two's complement) |
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32 ; 4 2 *unused* |
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33 ; 6 1 value type |
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34 ; |
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35 ; A value accumulator has the following structure for a string: |
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36 ; Offset Length Contents |
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37 ; 0 2 string length |
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38 ; 2 2 *reserved for string data pointer expansion, must be zero* |
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39 ; 4 2 string data pointer |
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40 ; 6 1 value type |
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41 ; |
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42 ; Value type constants |
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43 valtype_none equ 0 ; unknown value type |
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44 valtype_int equ 1 ; integer (32 bit) value (signed) |
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45 valtype_float equ 2 ; BCD float type (48 bit) value |
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46 valtype_string equ 3 ; string type (16 bit length, 16(32) bit data pointer |
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47 ; Floating point accumulator structure definitions |
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48 ; |
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49 ; Note: the extra precision bytes are needed for general calculations and need to be at least the same |
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50 ; size as the significand itself; the exponent will be stored with the bias. The accumulators are |
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51 ; unpacked. |
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52 fpa.exp equ 0 ; exponent - use largest size needed for any precision |
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53 fpa.sig equ fpa.exp+1 ; significand - use largest size needed for any precision |
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54 fpa.extra equ fpa.sig+5 ; extras; largest size needed for any precision, must follow significand |
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55 fpa.sign equ fpa.extra+5 ; sign flag |
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56 fpa.size equ fpa.sign+1 ; use the largest floating point accumulator size |
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57 ; String data definition |
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58 str.len equ 0 ; string length (2 bytes) |
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59 str.ptr equ str.len+2 ; string data pointer (3 bytes) |
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60 str.size equ str.ptr+3 |
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61 ; Value accumulator structure definitions; note that the actual value data must be first and any |
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62 ; incidental meta data must follow |
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63 val.value equ 0 ; offset of the value stored in the accumulator |
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64 val.fpsexp equ val.value ; floating point exponent (and sign) |
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65 val.fpssig equ val.fpsexp+1 ; floating point significand |
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66 val.int equ val.value ; integer offset |
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67 val.strlen equ val.value+str.len ; string length offset |
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68 val.strptr equ val.value+str.ptr ; string data pointer (low word) |
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69 val.type equ 6 ; use the largest of the data type sizes here |
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70 val.size equ val.type+1 ; size of a value accumulator |
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71 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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72 ifdef COCO3 |
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73 ; GIME INIT0 |
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74 GIME_COCO equ 0x80 ; Set for coco2 compatible mode (video display) |
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75 GIME_MMUEN equ 0x40 ; Set to enable MMU |
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76 GIME_IEN equ 0x20 ; GIME IRQ enable |
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77 GIME_FEN equ 0x10 ; GIME FIRQ enable |
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78 GIME_FExx equ 0x08 ; Enable constant RAM at 0xFExx (comes from block 0x3f) |
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79 GIME_SCS equ 0x04 ; Set to enable standard SCS (switches 0xFF5x) |
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80 GIME_ROME16 equ 0x00 ; 16K internal, 16K external ROM mode |
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81 GIME_ROME32 equ 0x03 ; 32K external ROM |
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82 GIME_ROMI32 equ 0x02 ; 32K internal ROM |
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83 ; GIME INIT1 |
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84 GIME_TMRFAT equ 0x20 ; TIMER ticks approx every 279.365 ns |
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85 GIME_TMRSLOW equ 0x00 ; TIMER ticks approx every 63.695 µs |
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86 GIME_TASK0 equ 0x00 ; MMU task 0 |
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87 GIME_TASK1 equ 0x01 ; MMU task 1 |
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88 ; GIME interrupt enable/status bits |
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89 GIME_ITIMER equ 0x20 ; TIMER interrupt (timer reaches 0) |
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90 GIME_IHBORD equ 0x10 ; HSYNC interrupt (falling edge) |
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91 GIME_IVBORD equ 0x08 ; VSYNC interrupt (falling edge) |
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92 GIME_ISERIAL equ 0x04 ; Falling edge of signal on pin 4 of serial port |
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93 GIME_IKEYBOARD equ 0x02 ; Interrupt if a 0 bit appears on bits 6-0 of PIA0.DA |
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94 GIME_ICART equ 0x01 ; Interrupt on falling edge of pin 8 of cartridge port |
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95 ; GIME VMODE |
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96 GIME_BP equ 0x80 ; enable bit plane mode |
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97 GIME_BPI equ 0x20 ; colour burst phase inversion (composite output only) |
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98 GIME_MONO equ 0x10 ; disable colour burst (composite output only) |
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99 GIME_H50 equ 0x08 ; set to 50Hz operation |
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100 GIME_LPR1 equ 0x00 ; one line per row |
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101 GIME_LPR2 equ 0x02 ; two lines per row (also works on graphics) |
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102 GIME_LPR8 equ 0x03 ; 8 lines per row |
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103 GIME_LPR9 equ 0x04 ; 9 lines per row |
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104 GIME_LPR10 equ 0x05 ; 10 lines per row |
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105 GIME_LPR11 equ 0x06 ; 11 lines per row |
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106 GIME_LPRINF equ 0x07 ; "infinite" lines per row |
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107 ; GIME VRES |
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108 GIME_LPF192 equ 0x00 ; 192 lines on screen |
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109 GIME_LPF200 equ 0x40 ; 200 lines on screen (actually 199 due to hardware bug) |
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110 GIME_LPF225 equ 0x60 ; 225 lines on screen |
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111 GIME_BPR16 equ 0x00 ; 16 bytes per row |
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112 GIME_BPR20 equ 0x04 ; 20 bytes per row |
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113 GIME_BPR32 equ 0x08 ; 32 bytes per row |
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114 GIME_BPR40 equ 0x0c ; 40 bytes per row |
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115 GIME_BPR64 equ 0x10 ; 64 bytes per row |
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116 GIME_BPR80 equ 0x14 ; 80 bytes per row |
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117 GIME_BPR128 equ 0x18 ; 128 bytes per row |
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118 GIME_BPR160 equ 0x1c ; 160 bytes per row |
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119 GIME_TXT32 equ 0x00 ; 32 characters per row |
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120 GIME_TXT40 equ 0x04 ; 40 characters per row |
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121 GIME_TXT64 equ 0x10 ; 64 characters per row |
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122 GIME_TXT80 equ 0x14 ; 80 characters per row |
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123 GIME_BPP1 equ 0x00 ; 1 bit per pixel |
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124 GIME_BPP2 equ 0x01 ; 2 bits per pixel |
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125 GIME_BPP4 equ 0x02 ; 4 bits per pixel |
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126 GIME_TXTATTR equ 0x01 ; text attributes enabled |
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127 endc |
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128 ifdef COCO3 |
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129 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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130 ; Stuff on the fixed memory page |
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131 org 0xfe00 |
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132 rmb 0xed ; unused |
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133 INT.FLAG rmb 1 ; validity flag |
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134 INT.SWI3 rmb 3 ; SWI3 bounce vector |
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135 INT.SWI2 rmb 3 ; SWI2 bounce vector |
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136 INT.FIRQ rmb 3 ; FIRQ bounce vector |
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137 INT.IRQ rmb 3 ; IRQ bounce vector |
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138 INT.SWI rmb 3 ; SWI bounce vector |
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139 INT.NMI rmb 3 ; NMI bounce vector |
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140 endc |
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141 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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142 ; Hardware definitions for the I/O page |
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143 org 0xff00 |
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144 PIA0 equ * ; Keyboard PIA |
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145 PIA0.DA rmb 1 ; PIA0 data/direction A |
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146 PIA0.CA rmb 1 ; PIA0 control A |
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147 PIA0.DB rmb 1 ; PIA0 data/direction B |
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148 PIA0.CB rmb 1 ; PIA0 control B |
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149 rmb 28 ; mirror images of PIA0 |
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150 PIA1 equ * ; DA/misc stuff |
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151 PIA1.DA rmb 1 ; PIA1 data/direction A |
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152 PIA1.CA rmb 1 ; PIA1 control A |
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153 PIA1.DB rmb 1 ; PIA1 data/direction B |
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154 PIA1.CB rmb 1 ; PIA1 control B |
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155 rmb 28 ; mirror images of PIA1 |
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156 rmb 16 ; SCS/Disk controller |
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157 rmb 16 ; second half of SCS area |
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158 rmb 32 ; miscelaneous hardware |
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159 ifdef COCO3 |
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160 rmb 16 ; *reserved* (unused but the GIME drives them) |
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161 GIME.INIT0 rmb 1 ; basic GIME system config |
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162 GIME.INIT1 rmb 1 ; MMU task and timer rate |
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163 GIME.IRQ rmb 1 ; GIME IRQ enable/status register |
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164 GIME.FIRQ rmb 1 ; GIME FIRQ enable/status register |
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165 GIME.TIMER rmb 2 ; GIME programmable timer |
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166 rmb 2 ; *reserved* |
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167 GIME.VMODE rmb 1 ; GIME video mode setting |
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168 GIME.VRES rmb 1 ; GIME video resolution setting |
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169 rmb 1 ; *reserved* (used for MMU expansion on some memory boards) |
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170 GIME.BORDER rmb 1 ; GIME border colour |
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171 GIME.VSCROLL rmb 1 ; vertical scroll offset register/VDG screen mode variation |
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172 GIME.VOFFSET rmb 2 ; address of video memory (8 byte increments) |
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173 GIME.HOFFSET rmb 1 ; horizontal scroll offset |
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174 GIME.MMU equ * ; MMU registers (two tasks) |
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175 GIME.MMU0 rmb 8 ; MMU task 0 |
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176 GIME.MMU1 rmb 8 ; MMU task 1 |
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177 GIME.PALETTE rmb 16 ; Palette registers |
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178 else |
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179 rmb 64 ; unused on Coco 1/2 (GIME on Coco 3) |
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180 endc |
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181 SAMREG equ * ; the SAM configuration register |
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182 SAM.V0CLR rmb 1 ; SAM video mode bits |
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183 SAM.V0SET rmb 1 |
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184 SAM.V1CLR rmb 1 |
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185 SAM.V1SET rmb 1 |
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186 SAM.V2CLR rmb 1 |
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187 SAM.V2SET rmb 1 |
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188 SAM.F0CLR rmb 1 ; SAM screen address bits |
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189 SAM.F0SET rmb 1 |
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190 SAM.F1CLR rmb 1 |
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191 SAM.F1SET rmb 1 |
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192 SAM.F2CLR rmb 1 |
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193 SAM.F2SET rmb 1 |
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194 SAM.F3CLR rmb 1 |
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195 SAM.F3SET rmb 1 |
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196 SAM.F4CLR rmb 1 |
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197 SAM.F4SET rmb 1 |
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198 SAM.F5CLR rmb 1 |
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199 SAM.F5SET rmb 1 |
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200 SAM.F6CLR rmb 1 |
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201 SAM.F6SET rmb 1 |
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202 SAM.P1CLR rmb 1 ; SAM "page 1" selection (or extra memory type flag) |
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203 SAM.P1SET rmb 1 |
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204 SAM.R0CLR rmb 1 ; SAM R0 bit (address dependent speedup, not used on Coco3) |
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205 SAM.R0SET rmb 1 |
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206 SAM.R1CLR rmb 1 ; SAM R1 bit (full speedup/coco 3 speedup) |
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207 SAM.R1SET rmb 1 |
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208 SAM.M0CLR rmb 1 ; SAM M0/M1 bits (memory type, not used on Coco3) |
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209 SAM.M0SET rmb 1 |
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|
210 SAM.M1CLR rmb 1 |
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211 SAM.M1SET rmb 1 |
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212 SAM.TYCLR rmb 1 ; force ROM mode (map type 0) |
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213 SAM.TYSET rmb 1 ; set RAM mode (map type 1) |
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214 rmb 18 ; *MPU reserved* |
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215 CPU.SWI3 rmb 2 ; CPU SWI3 vector |
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216 CPU.SWI2 rmb 2 ; CPU SWI2 vector |
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217 CPU.FIRQ rmb 2 ; CPU FIRQ vector |
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|
218 CPU.IRQ rmb 2 ; CPU IRQ vector |
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219 CPU.SWI rmb 2 ; CPU SWI vector |
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220 CPU.NMI rmb 2 ; CPU NMI vector |
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221 CPU.RESET rmb 2 ; CPU RESET/startup vector |
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|
222 *pragmapop list |