changeset 3:05ef3a3b6d65

Add conditionals for assembly of different variants of the ROM Because there are different requirements for the system initialization code between different Coco variants which require having different ROMs for those different models, add some conditionals to the initalization code. The variations supported here are: Coco 1/2: '783 SAM memory detection and configuration Coco2B: '785 SAM memory detection and configuration Coco3: No memory detection and configuration (GIME doesn't need it)
author William Astle <lost@l-w.ca>
date Thu, 03 Nov 2022 21:48:55 -0600
parents 19eac734a518
children 2b6e6b827bd7
files src/lwbasic.s
diffstat 1 files changed, 51 insertions(+), 6 deletions(-) [+]
line wrap: on
line diff
--- a/src/lwbasic.s	Thu Nov 03 21:18:51 2022 -0600
+++ b/src/lwbasic.s	Thu Nov 03 21:48:55 2022 -0600
@@ -8,6 +8,25 @@
                 *pragmapush list
                 *pragma nolist
                 *pragma noexpandcond
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;                
+; Utility macros
+;
+; skip next byte; flags preserved
+skip1           macro noexpand
+                fcb 0x21                        ; opcode for BRN
+                endm
+; skip next byte and load nonzero to A
+skip1lda        macro noexpand
+                fcb 0x86                        ; opcode for LDA immediate
+                endm
+; skip next byte and load nonzero to B
+skip1ldb        macro noexpand
+                fcb 0xc6                        ; opcoe for LDB immediate
+                endm
+; skip next 2 bytes; clobbers flags
+skip2           macro noexpand
+                fcb 0x8c                        ; opcode for CMPX immediate
+                endm
                 *pragmapop list
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Hardware definitions for the I/O page
@@ -78,7 +97,10 @@
 
 
                 org 0x8000                      ; the hardware puts the ROMs here; it's not negotiable
-START           clr PIA0.CA                     ; set PIA0 A to direction mode
+START           lda #0xff                       ; set DP to the IO page
+                tfr a,dp
+                setdp 0xff                      ; tell assembler about DP value
+                clr PIA0.CA                     ; set PIA0 A to direction mode
                 clr PIA0.CB                     ; set PIA0 B to direction mode
                 clr PIA0.DA                     ; set PIA0 A to all inputs (comparator, keyboard rows)
                 ldd #0xff34                     ; initiazer for later
@@ -98,7 +120,7 @@
                 lda #16                         ; clear 16 SAM register bits
                 ldu #SAMREG                     ; point to SAM register bits
 init0           sta ,u++                        ; clear SAM bit
-                decb                            ; done all?
+                deca                            ; done all?
                 bne init0                       ; brif not
 ; set the SAM to point to the text screen, which the code will handle at any
 ; arbitrary 512 byte aligned address in memory
@@ -123,17 +145,40 @@
                 ifne (textscreen)&0x8000
                 sta (SAM.F6SET-SAMREG)-16,u
                 endc
-                tfr b,dp                        ; set DP to bottom of memory (B is zero from above)
+                ifdef COCO2B
+; The following SAM configuration sequence is different from the one in the usual
+; one used by the earlier models of the Coco because the Coco2B has the '785 variant
+; of the SAM instead of the '783 variant. The '785 variant supports 16Kx4 RAMs which
+; are used in Coco2B systems. Hence why there is a different version of this ROM
+; just for the Coco2B.
+                clr PIA0.DB                     ; strobe RAM size low
+                ldb #4                          ; is input low?
+                bitb PIA1.DB
+                beq init1                       ; brif not
+                sta SAM.M0SET                   ; program SAM for 16Kx4 RAMs
+                sta SAM.P1SET
+                skip2
+init1           sta SAM.M1SET                   ; program SAM for 64Kx1 RAMs
+                else
+                ifndef COCO3
+; Detect the installed memory size so the SAM ('783 variant) can be correctly
+; programmed for the installed memory. Note that this sequence is replaced with
+; a different one for the Coco2B which has the '785 variant of the SAM.
+                ldb #0xff                       ; strobe RAM size high
+                stb PIA0.DB
                 ldb #4                          ; mask for ram size check
-                sta PIA0.DB                     ; set RAM size output for probe
                 bitb PIA1.DB                    ; is the bit set on ram size input?
                 beq init2                       ; brif not - 4Kx1 RAMs
-                clr PIA0.DB                     ; clear RAM size output to see what happens
+                sta PIA0.DB                     ; clear RAM size output to see what happens (A is 0 from above)
                 bitb PIA1.DB                    ; is it set now?
                 beq init1                       ; brif not - 64Kx1 RAMs
                 leau -2,u                       ; adjust pointer so we set the other RAM size bit for the SAM (16Kx1)
 init1           sta -3,u                        ; set M0 (16Kx1) or M1 (64Kx1)
-init2           lds #textscreen                 ; put the stack just below the text screen
+                endc
+                endc
+init2           tfr a,dp                        ; set DP to bottom of memory (A is 0 from above)
+                setdp 0                         ; tell assembler about it
+                lds #textscreen                 ; put the stack just below the text screen
 ; Need to ensure the vectors are at 0xbff2
                 zmb 0xbff2-*                    ; pad ROM up to the vector point
                 fdb 0                           ; SWI3 vector