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annotate src/lwbasic.s @ 121:5d5472b11ccd
Initital skeleton of separation of separate parsing scheme
This is the first commit in a long series related to separating the parsing
of the input code from the execution of the code. It should allow for more
efficient, and probably simpler, execution while giving quicker feedback
when someone types in syntactically invalid code.
author | William Astle <lost@l-w.ca> |
---|---|
date | Sun, 31 Dec 2023 17:44:39 -0700 |
parents | a6a53e5c04bd |
children | 9d57279c900e |
rev | line source |
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2
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Makefile to actually build something with initial start to ROM init code
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1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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2 ; LWBasic Version 0.1 |
19eac734a518
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3 ; Copyright © 2022 Lost Wizard Enterprises Incorporated |
19eac734a518
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4 ; |
19eac734a518
Makefile to actually build something with initial start to ROM init code
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5 ; This is LWBasic, a replacement Basic ROM system for the TRS-80 Color Computer which |
19eac734a518
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6 ; is most definitely not binary compatible with the stock ROMs. |
19eac734a518
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7 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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8 *pragmapush list |
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9 *pragma nolist |
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10 *pragma noexpandcond |
7
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11 *pragma cescapes |
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12 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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13 ; Utility macros |
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14 ; |
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15 ; skip next byte; flags preserved |
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16 skip1 macro noexpand |
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17 fcb 0x21 ; opcode for BRN |
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18 endm |
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19 ; skip next byte and load nonzero to A |
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20 skip1lda macro noexpand |
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21 fcb 0x86 ; opcode for LDA immediate |
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22 endm |
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23 ; skip next byte and load nonzero to B |
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24 skip1ldb macro noexpand |
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25 fcb 0xc6 ; opcoe for LDB immediate |
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26 endm |
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27 ; skip next 2 bytes; clobbers flags |
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28 skip2 macro noexpand |
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29 fcb 0x8c ; opcode for CMPX immediate |
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30 endm |
73
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31 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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32 ; Include the various sub source files |
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33 include defs.s |
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34 include vars.s |
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35 *pragmapop list |
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36 org 0x8000 ; the hardware puts the ROMs here; it's not negotiable |
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06417341c50e
Add memory size detection (coco1/2) and rearrange variables some
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37 ROMSTART equ * |
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38 *pragmapush list |
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39 *pragma nolist |
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40 include init.s |
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41 include keyb.s |
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42 include irq.s |
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43 include consscr.s |
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44 include genio.s |
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45 include interp.s |
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46 include progctrl.s |
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a6a53e5c04bd
Make a call stack implementation that is more complete and maybe cleaner.
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47 include stack.s |
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48 include print.s |
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49 include error.s |
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50 include expr.s |
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51 include number.s |
80
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Checkpoint with very basic integer and floating point arithmetic, untested
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52 include int.s |
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53 include fps.s |
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54 include token.s |
121
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Initital skeleton of separation of separate parsing scheme
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55 include bytecode.s |
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56 include parse.s |
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57 include keywordtab.s |
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58 include miscdata.s |
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59 include keywords.s |
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60 *pragmapop list |
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61 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2
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62 ; Need to ensure the vectors are at 0xbff2 |
19eac734a518
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63 zmb 0xbff2-* ; pad ROM up to the vector point |
5
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More Coco3 specific initialization and interrupt vectors
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64 fdb SW3VEC ; SWI3 vector |
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65 fdb SW2VEC ; SWI2 vector |
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66 fdb FRQVEC ; FIRQ vector |
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67 fdb IRQVEC ; IRQ vector |
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68 fdb SWIVEC ; SWI vector |
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69 fdb NMIVEC ; NMI vector |
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70 fdb START ; RESET vector (ROM entry point) |
4
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71 endc |
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72 ifdef COCO3 |
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73 zmb 0xfff2-* ; pad ROM to bottom of vectors |
5
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74 fdb INT.SWI3 ; SWI3 vector |
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75 fdb INT.SWI2 ; SWI2 vector |
80c18925436d
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76 fdb INT.FIRQ ; FIRQ vector |
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77 fdb INT.IRQ ; IRQ vector |
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78 fdb INT.SWI ; SWI vector |
80c18925436d
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79 fdb INT.NMI ; NMI vector |
4
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80 fdb START ; RESET vector (ROM entry point) |
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81 else |
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82 zmb 0x10000-* ; pad ROM to full size |
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83 endc |