Mercurial > hg > index.cgi

annotate src/lwbasic.s @ 135:3a4cb89a419c

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Add a memory insertion routine to swap the end block into middle of a block
author William Astle <lost@l-w.ca>
date Tue, 09 Jul 2024 22:18:30 -0600
parents 9d57279c900e
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
2 ; LWBasic Version 0.1
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
3 ; Copyright © 2022 Lost Wizard Enterprises Incorporated
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
4 ;
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
5 ; This is LWBasic, a replacement Basic ROM system for the TRS-80 Color Computer which
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
6 ; is most definitely not binary compatible with the stock ROMs.
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
7 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
8 *pragmapush list
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
9 *pragma nolist
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
10 *pragma noexpandcond
7
b898c74f745c Add console output driver and a greeting message
William Astle <lost@l-w.ca>
parents: 6
diff changeset
11 *pragma cescapes
3
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
12 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
13 ; Utility macros
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
14 ;
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
15 ; skip next byte; flags preserved
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
16 skip1 macro noexpand
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
17 fcb 0x21 ; opcode for BRN
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
18 endm
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
19 ; skip next byte and load nonzero to A
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
20 skip1lda macro noexpand
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
21 fcb 0x86 ; opcode for LDA immediate
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
22 endm
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
23 ; skip next byte and load nonzero to B
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
24 skip1ldb macro noexpand
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
25 fcb 0xc6 ; opcoe for LDB immediate
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
26 endm
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
27 ; skip next 2 bytes; clobbers flags
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
28 skip2 macro noexpand
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
29 fcb 0x8c ; opcode for CMPX immediate
05ef3a3b6d65 Add conditionals for assembly of different variants of the ROM
William Astle <lost@l-w.ca>
parents: 2
diff changeset
30 endm
73
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
31 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
32 ; Include the various sub source files
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
33 include defs.s
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
34 include vars.s
2
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
35 *pragmapop list
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
36 org 0x8000 ; the hardware puts the ROMs here; it's not negotiable
22
06417341c50e Add memory size detection (coco1/2) and rearrange variables some
William Astle <lost@l-w.ca>
parents: 21
diff changeset
37 ROMSTART equ *
73
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
38 *pragmapush list
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
39 *pragma nolist
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
40 include init.s
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
41 include keyb.s
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
42 include irq.s
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
43 include consscr.s
74
e74d00ac6b79 Split some code into separate files for easier management (2)
William Astle <lost@l-w.ca>
parents: 73
diff changeset
44 include genio.s
135
3a4cb89a419c Add a memory insertion routine to swap the end block into middle of a block
William Astle <lost@l-w.ca>
parents: 128
diff changeset
45 include memory.s
74
e74d00ac6b79 Split some code into separate files for easier management (2)
William Astle <lost@l-w.ca>
parents: 73
diff changeset
46 include interp.s
e74d00ac6b79 Split some code into separate files for easier management (2)
William Astle <lost@l-w.ca>
parents: 73
diff changeset
47 include progctrl.s
119
a6a53e5c04bd Make a call stack implementation that is more complete and maybe cleaner.
William Astle <lost@l-w.ca>
parents: 80
diff changeset
48 include stack.s
74
e74d00ac6b79 Split some code into separate files for easier management (2)
William Astle <lost@l-w.ca>
parents: 73
diff changeset
49 include print.s
75
5f8f0b0781e8 Split some code into separate files for easier management (3)
William Astle <lost@l-w.ca>
parents: 74
diff changeset
50 include error.s
5f8f0b0781e8 Split some code into separate files for easier management (3)
William Astle <lost@l-w.ca>
parents: 74
diff changeset
51 include expr.s
76
eb2681108660 Split some code into separate files for easier management (4)
William Astle <lost@l-w.ca>
parents: 75
diff changeset
52 include number.s
80
bb50ac9fdf37 Checkpoint with very basic integer and floating point arithmetic, untested
William Astle <lost@l-w.ca>
parents: 76
diff changeset
53 include int.s
bb50ac9fdf37 Checkpoint with very basic integer and floating point arithmetic, untested
William Astle <lost@l-w.ca>
parents: 76
diff changeset
54 include fps.s
121
5d5472b11ccd Initital skeleton of separation of separate parsing scheme
William Astle <lost@l-w.ca>
parents: 119
diff changeset
55 include bytecode.s
5d5472b11ccd Initital skeleton of separation of separate parsing scheme
William Astle <lost@l-w.ca>
parents: 119
diff changeset
56 include parse.s
5d5472b11ccd Initital skeleton of separation of separate parsing scheme
William Astle <lost@l-w.ca>
parents: 119
diff changeset
57 include keywordtab.s
74
e74d00ac6b79 Split some code into separate files for easier management (2)
William Astle <lost@l-w.ca>
parents: 73
diff changeset
58 include miscdata.s
73
2d52cd154ed1 Split some code into separate files for easier management
William Astle <lost@l-w.ca>
parents: 72
diff changeset
59 *pragmapop list
17
f86967c0bc73 Add general keyboard input (blinking cursor) handler
William Astle <lost@l-w.ca>
parents: 16
diff changeset
60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
61 ; Need to ensure the vectors are at 0xbff2
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
62 zmb 0xbff2-* ; pad ROM up to the vector point
5
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
63 fdb SW3VEC ; SWI3 vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
64 fdb SW2VEC ; SWI2 vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
65 fdb FRQVEC ; FIRQ vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
66 fdb IRQVEC ; IRQ vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
67 fdb SWIVEC ; SWI vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
68 fdb NMIVEC ; NMI vector
2
19eac734a518 Makefile to actually build something with initial start to ROM init code
William Astle <lost@l-w.ca>
parents:
diff changeset
69 fdb START ; RESET vector (ROM entry point)
4
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
70 endc
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
71 ifdef COCO3
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
72 zmb 0xfff2-* ; pad ROM to bottom of vectors
5
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
73 fdb INT.SWI3 ; SWI3 vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
74 fdb INT.SWI2 ; SWI2 vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
75 fdb INT.FIRQ ; FIRQ vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
76 fdb INT.IRQ ; IRQ vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
77 fdb INT.SWI ; SWI vector
80c18925436d More Coco3 specific initialization and interrupt vectors
William Astle <lost@l-w.ca>
parents: 4
diff changeset
78 fdb INT.NMI ; NMI vector
4
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
79 fdb START ; RESET vector (ROM entry point)
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
80 else
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
81 zmb 0x10000-* ; pad ROM to full size
2b6e6b827bd7 Additional Coco 3 build adjustments
William Astle <lost@l-w.ca>
parents: 3
diff changeset
82 endc